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• Introduction
• Definitions and Basic Properties
• Minimization of Variables: Exact Method
• Minimization of Variables: Heuristic Method
• Two-Class Functions
• Linear Decomposition
• Data Mining and Machine Learning
• Functions with Multi-Valued Inputs
• Easily Reconstructable Functions
• Functions with Continuous Variables
• References
• Conclusions

This book introduces a novel perspective on machine learning, offering distinct advantages over neural network-based techniques. This approach boasts a reduced hardware requirement, lower power consumption, and enhanced interpretability. The applications of this approach encompass high-speed classifications, including packet classification, network intrusion detection, and exotic particle detection in high-energy physics. Moreover, it finds utility in medical diagnosis scenarios characterized by small training sets and imbalanced data. The resulting rule generated by this method can be implemented either in software or hardware. In the case of hardware implementation, circuit design can employ look-up tables (memory), rather than threshold gates. The methodology described in this book involves extracting a set of rules from a training set, composed of categorical variable vectors and their corresponding classes. Unnecessary variables are eliminated, and the rules are simplified before being transformed into a sum-of-products (SOP) form. The resulting SOP exhibits the ability to generalize and predict outputs for new inputs. The effectiveness of this approach is demonstrated through numerous examples and experimental results using the University of California-Irvine (UCI) dataset. This book is primarily intended for graduate students and researchers in the fields of logic synthesis, machine learning, and data mining. It assumes a foundational understanding of logic synthesis, while familiarity with linear algebra and statistics would be beneficial for readers

• Preface Acknowledgments Introduction Applications Definitions and Basic Properties Index Generation Functions and Their Realizations Minimization of Primitive Variables Linear Transformations of Input Variables Iterative Reduction of Compound Variables Irreducible Index Generation Function SAT-Based Method to Find Linear Transformations Statistical Approach Realization Using Four IGUs References on Index Generation Functions Conclusions Bibliography Author's Biography Index.
• (source: Nielsen Book Data)

Index generation functions are binary-input integer valued functions. They represent functions of content addressable memories (CAMs). Applications include: IP address tables; terminal controllers; URL lists; computer virus scanning circuits; memory patch circuits; list of English words; code converters; and pattern matching circuits.This book shows memory-based realization of index generation functions. It shows: methods to implement index generation functions by look-up table (LUT) cascades and index generation units (IGU), methods to reduce the number of variables using linear transformations, and methods to estimate the sizes of memories, with many illustrations, tables, examples, exercises, and their solutions.
(source: Nielsen Book Data)

• Preface Acknowledgments Introduction Applications Definitions and Basic Properties Index Generation Functions and Their Realizations Minimization of Primitive Variables Linear Transformations of Input Variables Iterative Reduction of Compound Variables Irreducible Index Generation Function SAT-Based Method to Find Linear Transformations Statistical Approach Realization Using Four IGUs References on Index Generation Functions Conclusions Bibliography Author's Biography Index.
• (source: Nielsen Book Data)

Index generation functions are binary-input integer valued functions. They represent functions of content addressable memories (CAMs). Applications include: IP address tables; terminal controllers; URL lists; computer virus scanning circuits; memory patch circuits; list of English words; code converters; and pattern matching circuits.This book shows memory-based realization of index generation functions. It shows: methods to implement index generation functions by look-up table (LUT) cascades and index generation units (IGU), methods to reduce the number of variables using linear transformations, and methods to estimate the sizes of memories, with many illustrations, tables, examples, exercises, and their solutions.
(source: Nielsen Book Data)

• Preface Acknowledgments Introduction to Zero-Suppressed Decision Diagrams Efficient Generation of Prime Implicants and Irredundant Sum-of-Products Expressions The Power of Enumeration--BDD/ZDD-Based Algorithms for Tackling Combinatorial Explosion Regular Expression Matching Using Zero-Suppressed Decision Diagrams Authors' and Editors' Biographies Index.
• (source: Nielsen Book Data)

A zero-suppressed decision diagram (ZDD) is a data structure to represent objects that typically contain many zeros. Applications include combinatorial problems, such as graphs, circuits, faults, and data mining. This book consists of four chapters on the applications of ZDDs. The first chapter by Alan Mishchenko introduces the ZDD. It compares ZDDs to BDDs, showing why a more compact representation is usually achieved in a ZDD. The focus is on sets of subsets and on sum-of-products (SOP) expressions. Methods to generate all the prime implicants (PIs), and to generate irredundant SOPs are shown. A list of papers on the applications of ZDDs is also presented. In the appendix, ZDD procedures in the CUDD package are described. The second chapter by Tsutomu Sasao shows methods to generate PIs and irredundant SOPs using a divide and conquer method. This chapter helps the reader to understand the methods presented in the first chapter. The third chapter by Shin-Ichi Minato introduces the "frontier-based" method that efficiently enumerates certain subsets of a graph. The final chapter by Shinobu Nagayama shows a method to match strings of characters. This is important in routers, for example, where one must match the address information of an internet packet to the proprer output port. It shows that ZDDs are more compact than BDDs in solving this important problem. Each chapter contains exercises, and the appendix contains their solutions.
(source: Nielsen Book Data)

• Introduction
• Basic Elements
• Definitions and Basic Properties
• MUX-Based Synthesis
• Cascade-Based Synthesis
• Encoding Method
• Functions with Small C-Measures
• C-Measure of Sparse Functions
• Index Generation Functions
• Hash-Based Synthesis
• Reduction of the Number of Variables
• Various Realizations
• Conclusions.

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.

• Mathematical foundation
• lattice and Boolean algebra
• logic functions and their representations
• optimization of and-or two-level logic networks
• logic functions with various properties
• sequential networks
• optimization of sequential networks
• delay and asynchronous behavior
• multi-valued input two-valued output function
• heuristic optimization of two-level networks
• multi-level logic synthesis
• logic design using modules
• logic design using EXORs
• complexity of logic networks.
• (source: Nielsen Book Data)

"Switching Theory for Logic Synthesis" covers the basic topics of switching theory and logic synthesis in fourteen chapters. Chapters 1 through 5 provide the mathematical foundation. Chapters 6 through 8 include an introduction to sequential circuits, optimization of sequential machines and asynchronous sequential circuits. Chapters 9 through 14 are the main feature of the book. These chapters introduce and explain various topics that make up the subject of logic synthesis: multi-valued input two-valued output function, logic design for PLDs/FPGAs, EXOR-based design, and complexity theories of logic networks.An appendix providing a history of switching theory is included. The reference list consists of over four hundred entries. "Switching Theory for Logic Synthesis" is based on the author's lectures at Kyushu Institute of Technology as well as seminars for CAD engineers from various Japanese technology companies. "Switching Theory for Logic Synthesis" will be of interest to CAD professionals and students at the advanced level. It is also useful as a textbook, as each chapter contains examples, illustrations, and exercises.
(source: Nielsen Book Data)

"Logic Synthesis and Optimization" presents up-to-date research information in a pedagogical form. The authors are recognized as the leading experts on the subject. The focus of the book is on logic minimization and includes such topics as two-level minimization, multi-level minimization, application of binary decision diagrams, delay optimization, asynchronous circuits, spectral method for logic design, field programmable gate array (FPGA) design, EXOR logic synthesis and technology mapping. Examples and illustrations are included so that each contribution can be read independently. "Logic Synthesis and Optimization" is an indispensable reference for academic researchers as well as professional CAD engineers.
(source: Nielsen Book Data)

• Foreword. Preface. 1: Two-Level Logic Minimization
• O. Coudert, T. Sasao. 2: Multi-Level Logic Optimization
• M. Fujita, Y. Matsunaga, M. Ciesielski. 3: Flexibility in Logic
• E. Sentovich, D. Brand. 4: Multiple-Valued Logic Synthesis and Optimization
• E. Dubrovna. 5: Technology Mapping
• L. Stok, V. Tiwari. 6: Technology-based Transformations
• R. Murgai. 7: Logical and Physical Design: A Flow Perspective
• O. Coudert. 8: Logic Synthesis for Low Power
• L. Benini, G. de Micheli. 9: Optimization of Synchronous Circuits
• S. Hassoun, T. Villa. 10: Asynchronous Control Circuits
• L. Lavagno, S.M. Nowick. 11: Ordered Binary Decision Diagrams
• R.E. Bryant, C. Meinel. 12: SAT and ATPG: Algorithms for Boolean Decision Problems
• W. Kunz, J. Marques-Silva, S. Malik. 13: Combinatorial and Sequential Equivalence Checking
• A. Kuehlmann, C.A.J. van Eijk. 14: Static Timing Analysis
• Y. Kukimoto, M. Berkelaar, K. Sakallah. 15: The Future of Logic Synthesis and Verification
• R.K. Brayton. Appendices: A: About the Authors. B: Author Contact Information. Index.
• (source: Nielsen Book Data)

Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's plethora of electronic components. While this maturity is assuring, the advances in fabrication continue to seemingly present unwieldy challenges. "Logic Synthesis and Verification" provides a state-of-the-art view of logic synthesis and verification. It consists of fifteen chapters, each focusing on a distinct aspect. Each chapter presents key developments, outlines future challenges, and lists essential references. Two unique features of this book are technical strength and comprehensiveness. The book chapters are written by twenty-eight recognized leaders in the field and reviewed by equally qualified experts. The topics collectively span the field. "Logic Synthesis and Verification" fills a current gap in the existing CAD literature. Each chapter contains essential information to study a topic at a great depth, and to understand further developments in the field. The book is intended for seniors, graduate students, researchers, and developers of related Computer-Aided Design (CAD) tools. From the foreword: 'The commercial success of logic synthesis and verification is due in large part to the ideas of many of the authors of this book. Their innovative work contributed to design automation tools that permanently changed the course of electronic design' by Aart J. de Geus, Chairman and CEO, Synopsys, Inc.
(source: Nielsen Book Data)

• Equivalence Classes of Boolean Functions Boolean Functions for Cryptography Boolean Differential Calculus Synthesis of Boolean Functions in Reversible Logic Data Mining Using Binary Decision Diagrams.
• (source: Nielsen Book Data)

This book brings together five topics on the application of Boolean functions. They are: 1. Equivalence classes of Boolean functions: The number of n-variable functions is large, even for values as small as n = 6, and there has been much research on classifying functions. There are many classifications, each with their own distinct merit. 2. Boolean functions for cryptography: The process of encrypting/decrypting plaintext messages often depends on Boolean functions with specific properties. For example, highly nonlinear functions are valued because they are less susceptible to linear attacks. 3. Boolean differential calculus: An operation analogous to taking the derivative of a real-valued function offers important insight into the properties of Boolean functions. One can determine tests or susceptibility to hazards. 4. Reversible logic: Most logic functions are irreversible; it is impossible to reconstruct the input, given the output. However, Boolean functions that are reversible are necessary for quantum computing, and hold significant promise for low-power computing. 5. Data mining: The process of extracting subtle patterns from enormous amounts of data has benefited from the use of a graph-based representation of Boolean functions. This has use in surveillance, fraud detection, scientific discovery including bio-informatics, genetics, medicine, and education. Written by experts, these chapters present a tutorial view of new and emerging technologies in Boolean functions.
(source: Nielsen Book Data)

• Equivalence Classes of Boolean Functions Boolean Functions for Cryptography Boolean Differential Calculus Synthesis of Boolean Functions in Reversible Logic Data Mining Using Binary Decision Diagrams.
• (source: Nielsen Book Data)

This book brings together five topics on the application of Boolean functions. They are: 1. Equivalence classes of Boolean functions: The number of n-variable functions is large, even for values as small as n = 6, and there has been much research on classifying functions. There are many classifications, each with their own distinct merit. 2. Boolean functions for cryptography: The process of encrypting/decrypting plaintext messages often depends on Boolean functions with specific properties. For example, highly nonlinear functions are valued because they are less susceptible to linear attacks. 3. Boolean differential calculus: An operation analogous to taking the derivative of a real-valued function offers important insight into the properties of Boolean functions. One can determine tests or susceptibility to hazards. 4. Reversible logic: Most logic functions are irreversible; it is impossible to reconstruct the input, given the output. However, Boolean functions that are reversible are necessary for quantum computing, and hold significant promise for low-power computing. 5. Data mining: The process of extracting subtle patterns from enormous amounts of data has benefited from the use of a graph-based representation of Boolean functions. This has use in surveillance, fraud detection, scientific discovery including bio-informatics, genetics, medicine, and education. Written by experts, these chapters present a tutorial view of new and emerging technologies in Boolean functions.
(source: Nielsen Book Data)

• Preface Acknowledgments Introduction to Zero-Suppressed Decision Diagrams Efficient Generation of Prime Implicants and Irredundant Sum-of-Products Expressions The Power of Enumeration--BDD/ZDD-Based Algorithms for Tackling Combinatorial Explosion Regular Expression Matching Using Zero-Suppressed Decision Diagrams Authors' and Editors' Biographies Index.
• (source: Nielsen Book Data)

A zero-suppressed decision diagram (ZDD) is a data structure to represent objects that typically contain many zeros. Applications include combinatorial problems, such as graphs, circuits, faults, and data mining. This book consists of four chapters on the applications of ZDDs. The first chapter by Alan Mishchenko introduces the ZDD. It compares ZDDs to BDDs, showing why a more compact representation is usually achieved in a ZDD. The focus is on sets of subsets and on sum-of-products (SOP) expressions. Methods to generate all the prime implicants (PIs), and to generate irredundant SOPs are shown. A list of papers on the applications of ZDDs is also presented. In the appendix, ZDD procedures in the CUDD package are described. The second chapter by Tsutomu Sasao shows methods to generate PIs and irredundant SOPs using a divide and conquer method. This chapter helps the reader to understand the methods presented in the first chapter. The third chapter by Shin-Ichi Minato introduces the "frontier-based" method that efficiently enumerates certain subsets of a graph. The final chapter by Shinobu Nagayama shows a method to match strings of characters. This is important in routers, for example, where one must match the address information of an internet packet to the proprer output port. It shows that ZDDs are more compact than BDDs in solving this important problem. Each chapter contains exercises, and the appendix contains their solutions.
(source: Nielsen Book Data)

• 1. Graph-Based Representations of Discrete Functions. 2. Representations of Logic Functions Using Exor Operators. 3. Spectral Transform Decision Diagrams
• R.S. Stankovic, et al. 4. Multi-Terminal Binary Decision Diagrams and Hybrid Decision Diagrams
• E.M. Clarke, et al. 5. Edge Valued Binary Decision Diagrams
• S.B.K. Vrudhula, et al. 6. Arithmetic Transform of Boolean Functions
• J. Jain. 7. OKFDDS - Algorithms, Applications and Extensions
• R. Drechsler, B. Becker. 8. Exact Minimization of FPRMs Using Multi-Terminal Exor TDDs
• T. Sasao, F. Izuhara. 9. Multiple Domain Logic Synthesis
• J. Bullmann, U. Kebschull. 10. Satisfiability Problems for OFDDs
• R. Werchner, et al. 11. Complexity Theoretical Aspects of OFDDs
• B. Bollig, et al. 12. Ternary Decision Diagrams and Their Applications
• T. Sasao. 13. Or-and-Or Three-Level Networks
• T. Sasao.
• (source: Nielsen Book Data)

"Representations of Discrete Functions" is an edited volume containing 13 chapter contributions from leading researchers with a focus on the latest research results. The first three chapters are introductions and contain many illustrations to clarify concepts presented in the text. It is recommended that these chapters are read first. The book then deals with the following topics: binary decision diagrams (BDDs), multi-terminal binary decision diagrams (MTBDDs), edge-valued binary decision diagrams (EVBDDs), functional decision diagrams (FDDs), Kronecker decision diagrams (KDDs), binary moment diagrams (BMDs), spectral transform decision diagrams (STDDs), ternary decision diagrams (TDDs), spectral transformation of logic functions, other transformations of logic functions, EXOR-based two-level expressions, FPRM minimization with TDDs and MTBDDs, complexity theories on FDDs, multi-level logic synthesis, and complexity of three-level logic networks."Representations of Discrete Functions" is designed for CAD researchers and engineers and will also be of interest to computer scientists who are interested in combinatorial problems. Exercises prepared by the editors help make this book useful as a graduate level textbook.
(source: Nielsen Book Data)