1 - 20
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- Blanchet, Gerard.
- London : Iste ; Hoboken, NJ : Wiley, 2013.
- Description
- Book — 1 online resource (xiv, 364 p.) : ill.
- Summary
-
- Preface xiii
- Part 1. Elements of a Basic Architecture 1
- Chapter 1. Introduction 3 1.1. Historical background 3 1.2. Introduction to internal operation 13 1.3. Future prospects 15
- Chapter 2. The Basic Module 17 2.1. Memory 17 2.2. The processor 20 2.3. Communication between modules 30
- Chapter 3. The Representation of Information 35 3.1 Review 36 3.2. Number representation conventions 38 3.3. Character representation 48 3.4 Exercises 52
- Part 2. Programming Model and Operations 55
- Chapter 4. Instructions 57 4.1. Programming model 58 4.2 The set of instructions 62 4.3. Programming examples 68 4.4. From assembly language to basic instructions 70
- Chapter 5. The Processor 74 5.1. The control bus 76 5.2. Execution of the instruction 79 5.3. Sequencer composition 87 5.4. Extensions 91 5.5. Exercise 101
- Chapter 6. Inputs and Outputs 103 6.1. Examples 105 6.2. Design and addressing of EU 115 6.3. Exchange modes 118 6.4. Handling interrupts 127 6.5. Exercises 133
- Part 3. Memory Hierarchy 137
- Chapter 7. Memory 139 7.1. The memory resource 139 7.2. Characteristics 140 7.3. Memory hierarchy 141 7.4. Memory size and protection 145 7.5. Segmentation 145 7.6. Paging 148 7.7. Memory interleaving and burst mode 151 7.8. Protections, example of the I386 154
- Chapter 8. Caches 157 8.1. Cache memory 157 8.2. Replacements algorithms 165
- Chapter 9. Virtual Memory 175 9.1. General concept 176 9.2. Rules of the access method 178 9.3 Example of the execution of a program 182 9.4. Example of two-level paging 188 9.5 Paged segmentation 194 9.6. Exercise 197 9.7. Documentation excerpts 198
- Part 4. Parallelism and Performance Enhancement 205
- Chapter 10. Pipeline Architectures 207 10.1 Motivations and Ideas 207 10.2 Pipeline management problems 212 10.3 Handling branches 218 10.4 Interrupts and exceptions 233
- Chapter 11. Example of an Architecture 235 11.1 Presentation 235 11.2. Executing an instruction 240 11.3. Conflict resolution in the DLX 246 11.4. Exercises 252
- Chapter 12. Caches in a Multiprocessor Environment 261 12.1. Cache coherence 262 12.2. Examples of snooping protocols 267 12.3. Improvements 275 12.4. Directory-based coherence protocols 275 12.5. Consistency 278 12.6. Exercises 284
- Chapter 13. Superscaler Architectures 287 13.1. Superscaler architecture principles 287 13.2. Seeking solutions 290 13.3. Handling the flow of instructions 295 13.4. VLIW architectures 315 13.5. Exercises 321
- Part 5. Appendices 325 Appendix A. Hints and Solutions 327 A1.1 The representation of information 327 A1.2. The processor 330 A1.3. Inputs and outputs 331 A1.4. Virtual memory 333 A1.5. Pipeline architectures 335 A1.6. Caches in a multiprocessor environment 341 A1.7. Superscaler architectures 344 Appendix B. Programming Models 347 A2.1. Instruction coding in the I8086 347 A2.2. Instruction set of the DLX architecture 349 Bibliography 351 Index 357.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
- Upton, Eben, author.
- 1st - Hoboken, New Jersey : John Wiley & Sons, Inc., 2016
- Description
- Book — 1 online resource
- Summary
-
- Title Page; Table of Contents; Introduction; Cambridge; Cut to the Chase; The Knee in the Curve; Forward the Foundation;
- Chapter 1: The Shape of a Computer Phenomenon; Growing Delicious, Juicy Raspberries; System-on-a-Chip; An Exciting Credit Card-Sized Computer; What Does the Raspberry Pi Do?; Meeting and Greeting the Raspberry Pi Board; The Future;
- Chapter 2: Recapping Computing; The Cook as Computer; The Box That Follows a Plan; Voltages, Numbers and Meaning; Operating Systems: The Boss of the Box;
- Chapter 3: Electronic Memory; There Was Memory Before There Were Computers
- Rotating Magnetic MemoryMagnetic Core Memory; Static Random Access Memory (SRAM); Address Lines and Data Lines; Combining Memory Chips into Memory Systems; Dynamic Random Access Memory (DRAM); The Raspberry Pi Memory System; Cache; Virtual Memory;
- Chapter 4: ARM Processors and Systems-on-a-Chip; The Incredible Shrinking CPU; Digital Logic Primer; Inside the CPU; Rethinking the CPU: CISC vs. RISC; ARMs from Little Acorns Grow; ARM11; Coprocessors; ARM Cortex; Systems on a Single Chip;
- Chapter 5: Programming; Programming from a Height; How Native-Code Compilers Work; Pure Text Interpreters
- Bytecode Interpreted LanguagesData Building Blocks; Code Building Blocks; Object-Oriented Programming; A Tour of the GNU Compiler Collection Toolset;
- Chapter 6: Non-Volatile Storage; Punched Cards and Tape; Magnetic Recording and Encoding Schemes; Magnetic Disk Storage; Partitions and File Systems; Optical Discs; Ramdisks; Flash Storage;
- Chapter 7: Wired and Wireless Ethernet; The OSI Reference Model for Networking; Ethernet; Routers and the Internet; Wi-Fi;
- Chapter 8: Operating Systems; Introduction to Operating Systems; The Kernel: The Basic Facilitator of Operating Systems
- Enablers and Assistants to the Operating SystemOperating Systems for Raspberry Pi;
- Chapter 9: Video Codecs and Video Compression; The First Video Codecs; Changing with the Times; Motion Search;
- Chapter 10: 3D Graphics; A Brief History of 3D Graphics; The OpenGL Graphics Pipeline; Modern Graphics Hardware; Open VG; General Purpose GPUs;
- Chapter 11: Audio; Can You Hear Me Now?; Analog vs. Digital; Sound and Signal Processing; 1-Bit DAC; I2S; Raspberry Pi Sound Input/Output; Sound on the Raspberry Pi;
- Chapter 12: Input/Output; Introducing Input/Output; I/O Enablers; Raspberry Pi GPIO
(source: Nielsen Book Data)
- Second edition. - Boca Raton, FL : CRC Press, an imprint of Taylor and Francis, [2017].
- Description
- Book — 1 online resource (704 pages) : 569 illustrations
- Summary
-
- Volume Two MECHATRONIC SYSTEM CONTROL The Role of Controls in Mechatronics, J. van Amerongen The Role of Modeling in Mechatronics Design, J.A. Jalkio Signals and Systems, M.-J.E. Salami, R. Johansson, K. Leang, Q.Zou, S. Devasia, and C.N. Domy State Space Analysis and System Properties, M.E. Salgado and J.I. Yuz Response of Dynamic Systems, R. de Callafon The Root Locus Method, H. Ozbay Frequency Response Methods, J.-J. Sheen Kalman Filters as Dynamic System State Observers, T.P. Crain, II Digital Signal Processing for Mechatronic Applications, B.S. Heck and T.R. Kurfess Control System Design Via H 2 Optimization, A.A. Rodriquez Adaptive and Nonlinear Control Design, M.R. Akella Neural Networks and Fuzzy Systems, B.M. Wilamowski Advanced Control of an Electrohydraulic Axis, F. Ionescu, C. Vlad, and D. Arotaritei Design Optimization of Mechatronic Systems, T. Brezina, C. Kratochvil, and C. Ondrusek NEW! Motion Control Using SoftMotion Technology, R. Kulkarni NEW! Real-Time Monitoring and Control, G. Garcia NEW! Micromechatronics and Microelectromechanical Motion Devices, S.E. Lyshevski COMPUTERS AND LOGIC SYSTEMS Introduction to Computers and Logic Systems, K.C. Craig and F. Stolfi Digital Logic Concepts and Combinational Logic Design, G.I. Cohn System Interfaces, M.J. Tordon and J. Katupitiya Communications and Computer Networks, M. Ilyas Fault Analysis in Mechatronic Systems, L. Notash and T.N. Moore Logic System Design, M.K. Ramasubramanian Architecture, D.A. Connors and W.-M.W. Hwu Control with Embedded Computers and Programmable Logic Controllers, H. Jack and A. Sterian NEW! Graphical System Design for Embedded Systems, S. Gretlein NEW! Field-Programmable Gate Arrays, D. Fay and D.A. Connors NEW! Graphical Programming for Field-Programmable Gate Arrays: Applications in Control and Mechatronics, J. Falcon and M. Trimborn SOFTWARE AND DATA ACQUISITION Introduction to Data Acquisition, C. Anderson Measurement Techniques: Sensors and Transducers, C. Harrison A/D and D/A Conversion, B. Betts Signal Conditioning, S.A. Dyer NEW! Virtual Instrumentation Systems, D. Dement Software Design and Development, M.H. Hamilton Data Recording and Logging, C. Anderson Index Catalog no. 9260, November 2007, c. 712 pp., ISBN: 978-0-8493-9260-3, $99.95 / GBP52.99 Short TOC.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
- Khan, Ashraf, author.
- Birmingham, UK : Packt Publishing, 2017.
- Description
- Book — 1 online resource (1 volume) : illustrations
- Summary
-
Over 60 recipes to install, configure, and manage your IIS 10.0 About This Book * Provide a secure, easy-to-manage extensible platform for hosting your websites * Leverage IIS 10.0 in order to deploy web site in seconds * Integrate Windows and Nano Server 2016 and automate it with PowerShell * Recipes to Manage and monitor your IIS 10.0 Who This Book Is For If you are an administrator or web developer with a basic (or no) knowledge of Microsoft IIS and want to set up your own web server, then this is the book for you. What You Will Learn * Integrate IIS 10.0 on Windows server 2016 * Host multiple websites and Wildcard Host on IIS 10.0 * Deploy and administrate IIS 10.0 on Nano Server. * IIS administration with Powershell. * Manage and troubleshoot IIS 10.0 In Detail This book will start with customizing your IIS 10 to various platforms/OS and tune it according to your business requirements. Moving on, we will focus on the functionalities of core fundamentals and perform practical scenarios in order to maximize the use of a reliable web server. Going further we will be covering topics like IIS 10 architecture, IIS modules, hosting web server platforms, virtual directories along with web site deployment, ports, enhanced security. We will also cover new features of IIS 10 like integration with Windows Server 2016 and Nano Server, HTTP/2, PowerShell 5 cmdlets etc . Towards the end, we will cover troubleshooting & diagnostic techniques of IIS 10. By the end of this book you will be well versed with maximizing the reliability of your webserver and will have immense knowledge in using IIS 10 effectively Style and approach A set of exciting recipes on using Microsoft IIS 10.0 effectively..
(source: Nielsen Book Data)
- Khan, Ashraf, author.
- Birmingham, UK : Packt Publishing, 2017.
- Description
- Book — 1 online resource (1 volume) : illustrations
- Summary
-
Over 60 recipes to install, configure, and manage your IIS 10.0 About This Book * Provide a secure, easy-to-manage extensible platform for hosting your websites * Leverage IIS 10.0 in order to deploy web site in seconds * Integrate Windows and Nano Server 2016 and automate it with PowerShell * Recipes to Manage and monitor your IIS 10.0 Who This Book Is For If you are an administrator or web developer with a basic (or no) knowledge of Microsoft IIS and want to set up your own web server, then this is the book for you. What You Will Learn * Integrate IIS 10.0 on Windows server 2016 * Host multiple websites and Wildcard Host on IIS 10.0 * Deploy and administrate IIS 10.0 on Nano Server. * IIS administration with Powershell. * Manage and troubleshoot IIS 10.0 In Detail This book will start with customizing your IIS 10 to various platforms/OS and tune it according to your business requirements. Moving on, we will focus on the functionalities of core fundamentals and perform practical scenarios in order to maximize the use of a reliable web server. Going further we will be covering topics like IIS 10 architecture, IIS modules, hosting web server platforms, virtual directories along with web site deployment, ports, enhanced security. We will also cover new features of IIS 10 like integration with Windows Server 2016 and Nano Server, HTTP/2, PowerShell 5 cmdlets etc . Towards the end, we will cover troubleshooting & diagnostic techniques of IIS 10. By the end of this book you will be well versed with maximizing the reliability of your webserver and will have immense knowledge in using IIS 10 effectively Style and approach A set of exciting recipes on using Microsoft IIS 10.0 effectively..
(source: Nielsen Book Data)
- Solihin, Yan, author.
- First edition. - Boca Raton, FL : Chapman and Hall/CRC, an imprint of Taylor and Francis, 2015.
- Description
- Book — 1 online resource (494 pages) : 187 illustrations.
- Summary
-
- Perspectives on Multicore Architectures The Origin of the Multicore Architecture Perspectives on Parallel Computers Future Multicore Architectures
- Perspectives on Parallel Programming Limits on Parallel Program Performance Parallel Programming Models
- Shared Memory Parallel Programming Steps in Parallel Programming Dependence Analysis Identifying Parallel Tasks in Loop Structures Identifying Parallelism at Other Levels Identifying Parallelism through Algorithm Knowledge Determining the Scope of Variables Synchronization Assigning Tasks to Threads Mapping Threads to Processors A Brief Introduction to OpenMP
- Parallel Programming for Linked Data Structures Parallelization Challenges in LDS Approaches to Parallelization of LDS Parallelization Techniques for Linked Lists The Role of Transactional Memory
- Introduction to Memory Hierarchy Organization Motivation for Memory Hierarchy Basic Architectures of a Cache Cache Performance Prefetching Cache Design in Multicore Architecture Physical Cache Organization Logical Cache Organization Case Studies
- Introduction to Shared Memory Multiprocessors The Cache Coherence Problem Memory Consistency Problem Synchronization Problem
- Basic Cache Coherence Issues Overview Cache Coherence in Bus-Based Multiprocessors Impact of Cache Design on Cache Coherence Performance Performance and Other Practical Issues Broadcast Protocol with Point-to-Point Interconnect
- Hardware Support for Synchronization Lock Implementations Barrier Implementations Transactional Memory
- Memory Consistency Models Programmers' Intuition Architecture Mechanisms for Ensuring Sequential Consistency Relaxed Consistency Models Synchronization in Different Memory Consistency Models
- Advanced Cache Coherence Issues Directory Coherence Protocols Overview of Directory Coherence Protocol Basic Directory Cache Coherence Protocol Implementation Correctness and Performance Contemporary Design Issues
- Interconnection Network Architecture Link, Channel, and Latency Network Topology Routing Policies and Algorithms Router Architecture Case Study: Alpha 21364 Network Architecture Multicore Design Issues
- SIMT Architecture SIMT Programming Model Mapping SIMT Workloads to SIMT Cores SIMT Core Architecture
- Ask the Experts
- Exercises appear at the end of each chapter.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
7. Software architecture in practice [2013]
- Bass, Len, author.
- Third edition. - Upper Saddle River, NJ : Addison-Wesley, [2013]
- Description
- Book — 1 online resource (xix, 589 pages) : illustrations Digital: text file.
- Summary
-
The award-winning and highly influential Software Architecture in Practice, Third Edition, has been substantially revised to reflect the latest developments in the field. In a real-world setting, the book once again introduces the concepts and best practices of software architecture-how a software system is structured and how that system's elements are meant to interact. Distinct from the details of implementation, algorithm, and data representation, an architecture holds the key to achieving system quality, is a reusable asset that can be applied to subsequent systems, and is crucial to a software organization's business strategy. The authors have structured this edition around the concept of architecture influence cycles. Each cycle shows how architecture influences, and is influenced by, a particular context in which architecture plays a critical role. Contexts include technical environment, the life cycle of a project, an organization's business profile, and the architect's professional practices. The authors also have greatly expanded their treatment of quality attributes, which remain central to their architecture philosophy-with an entire chapter devoted to each attribute-and broadened their treatment of architectural patterns. If you design, develop, or manage large software systems (or plan to do so), you will find this book to be a valuable resource for getting up to speed on the state of the art. Totally new material covers Contexts of software architecture: technical, project, business, and professional Architecture competence: what this means both for individuals and organizations The origins of business goals and how this affects architecture Architecturally significant requirements, and how to determine them Architecture in the life cycle, including generate-and-test as a design philosophy; architecture conformance during implementation; architecture and testing; and architecture and agile development Architecture and current technologies, such as the cloud, social networks, and end-user devices.
(source: Nielsen Book Data)
- Pham, Tiffany, author.
- First edition - Boca Raton, FL : Productivity Press, [2018]
- Description
- Book — 1 online resource (298 pages) : 179 illustrations, text file, PDF
- Summary
-
- A CONCISE INTRODUCTION TO BUSINESS STRATEGY: CONCEPTS AND FORMULATION
- From Mission, Vision, and Values to Business Model--Chapter Objective--Mission, Vision, and Values-- Mission-- Vision-- Values--Business Model--Takeaways--References
- Business Strategy and Its Formulation--Chapter Objective--What Is Business Strategy?-- Key Criteria for a Good Business Strategy-- Internal Consistency-- External Consistency-- Dynamic Consistency-- Some Other Important Considerations--Trade-Offs-- Strategic Fit--From Core Competency to Value Creation-- Core Competency and Value Chain-- Core Competency--Value Chain-- Relative Cost Analysis-- Value Creation-- Some Special Perspective for Commercial Companies-- Some Special Perspective for Nonrofit Organizations--Michael Porters Five Forces Framework-- Michael Porters Five Forces-- Bargaining Power of Suppliers-- Bargaining Power of Customers-- Threat of New Entrants-- Threat of Substitutes-- Rivalry among Existing Competitors-- Walmart and Porters Five Forces-- The MoMA and Porters Five Forces-- Leading Uses of the Five Forces Framework-- A Sixth Force--ProductMarket Growth Directions Matrix--The Strategy Blade--From Business Strategy to Financial Goals--Takeaways--References
- AN INTRODUCTION TO LEAN, LEAN AND AGILE ORGANIZATION, AND LEAN AND AGILE IT--What Do We Mean by Lean, Lean and Agile Organization, and Lean and Agile IT?--Chapter Objective--What Is Lean?--So What Do We Mean by a Lean and Agile Organization and a Lean and Agile IT and IT Roadmap?--Takeaways--References
- FROM BUSINESS STRATEGY TO IT ROADMAP: AN INTRODUCTION TO ENTERPRISE ARCHITECTURE (EA)
- An Introduction to Business Strategy and IT Alignment--Chapter Objective--Why Business and IT Misalignment Is Unacceptable--How Can We Identify if There Is Such Misalignment?--Why Has IT Never Been Clearly Aligned with the Organizations Business Strategy?--How Can We More Clearly Align IT with an Organizations Business Strategy?--Introduction to Enterprise Architecture--A Look at the Different Layers of an Enterprise Architecture--Takeaways
- More on Enterprise Architecture (EA)--Chapter Objective--EA Framework-- Enterprise Business Architecture-- Business Objectives, Goals, and Metrics-- Business Processes-- Team Structure-- Enterprise IT Application Architecture-- Enterprise IT Data Architecture-- Enterprise IT Infrastructure Architecture-- Enterprise Security Architecture Layer--Takeaways--Reference
- FROM BUSINESS STRATEGY TO AN AGILE AND LEAN IT ROADMAP: THE FORMULATION PROCESS--A High-Level Overview of the IT Roadmap Formulation Process--Chapter Objective--Step 1: Identify Current Business and IT Situation--Step 2: Identify Future Business Strategy and IT Needs--Step 3: Identify Business and IT Gaps--Step 4: Identify the IT Roadmap--Takeaways
- More on the IT Roadmap Formulation Process
- Chapter Objective--Step 1: Identify the Current Business and IT Situation-- Current Enterprise Business Architecture-- Business Goals and Metrics-- Business Processes-- Team Structure-- Current Enterprise IT Application Architecture-- Current Enterprise IT Data Architecture-- Enterprise IT Transactional Data Architecture-- Current Enterprise IT Infrastructure Architecture--Step 2: Identify the Future Business Strategy and IT Situation-- Future Business Strategy and Its New Enterprise Business Architecture-- Future Goals and Direction-- Enterprise Business Processes-- Team Structure-- Future Enterprise IT Application Architecture-- Future Enterprise IT Data Architecture-- Future Enterprise IT Infrastructure Architecture--Step 3: Identify Business and IT Gaps-- Gaps in Enterprise Business Processes-- Gaps in Enterprise IT Application Architecture-- Gaps in Enterprise IT Data Architecture-- Transactional Applications-- Enterprise Business Intelligence/Analytics-- Gaps in Enterprise IT Infrastructure Architecture--Step 4: Identify the IT Roadmap-- The Organization or Business Units Business Direction and Financial Goals-- The Organization or Business Units Overall Enterprise Architecture-- Technical Migration Plan-- IT Budget--Takeaways
- From a Business Units IT Roadmap to an Enterprise IT Roadmap--Chapter Objective--The "What"--The "How"--Takeaways
- IT and Mergers and Acquisitions (M&A) Activities--Chapter Objective--Mergers and Acquisitions Evaluation Process--IT Due Diligence Questionnaire--Takeaways
- Change Management--Chapter Objective--Key Recommendations--Takeaways--Reference
- FROM IT ROADMAP FORMULATION TO EXECUTION
- Strategy Is Execution--Chapter Objective--Getting Organized for Execution-- Business and IT Governance Board-- Business Unit IT Steering Committee--What to Review?-- Business Goals Review-- IT Roadmap Execution Progress Review-- IT Budget Review--Revision to the IT Roadmap--Takeaways
- Parting Thoughts
- CAS E STUDIES
- Case Study 1: Commercial Case Study: All About HatWare
- Current Enterprise Business Architecture--Business Goals-- Business Processes-- Team Structure--Current Enterprise IT Application Architecture--Current Enterprise IT Data Architecture--Current Enterprise IT Infrastructure Architecture--Future Business Strategy and Its New Enterprise Business Architecture-- Competitive Analysis-- All About HatWares New Business Strategy-- Future Goals and Direction-- Future Enterprise Business Processes-- Future Team Structure--Future Enterprise IT Application Architecture--Future Enterprise IT Data Architecture--Future Enterprise IT Transactional Data Architecture-- Future Enterprise IT BI/Analytics Data Architecture--Future Enterprise IT Infrastructure Architecture--Gaps in Enterprise Business Processes--Gaps in Enterprise IT Application Architecture--Gaps in Enterprise IT Data Architecture--Gaps in Enterprise IT Infrastructure Architecture--IT Roadmap Components-- Business Strategy, Direction, and High-Level Goals-- Enterprise Architecture-- Business and Technology Initiatives Prioritization-- Timeline-- IT Budget--All About HatWares IT Roadmap Execution
- Case Study 2: Nonprofit Case Study: US Against Illiteracy
- Current Enterprise Business Architecture-- Business Goals-- Business Processes-- Team Structure--Current Enterprise IT Application Architecture--Current Enterprise IT Data Architecture-- Enterprise IT Transactional Data Architecture-- Enterprise IT BI Data Architecture--Current Enterprise IT Infrastructure Architecture--Future Business Strategy and Its New Enterprise Business Architecture-- Future Goals and Direction-- Future Team Structure-- Future Enterprise Business Processes--Future Enterprise IT Application Architecture--Future Enterprise IT Data Architecture--Future Enterprise IT Transactional Data Architecture-- Future Enterprise IT BI Data Architecture--Future Enterprise IT Infrastructure Architecture--Gaps in Enterprise Business Processes--Gaps in Enterprise IT Application Architecture-- Enterprise IT Transactional Applications--Enterprise IT BI Applications--Gaps in Enterprise IT Data Architecture--Gaps in Enterprise IT Infrastructure Architecture--IT Roadmap Components-- Business Strategy, Direction, and Goals-- Enterprise Architecture-- Business and Technology Initiatives Prioritization-- Timeline--IT Budget--US Against Illiteracys IT Roadmap Execution
- Appendices:
- The 10 Questions an IT Leader Should Ask His or Her CEO or Board Members--The 10 Questions the CEO or Board Member Should Ask His or Her IT Leader--Leveraging Social Media for Business Strategy--Leveraging Mobile Technology for Business Strategy--Leveraging Cloud Computing for Business Strategy--The Business Case for a New Business Technology Project--Buy or Build (Commercial Off-the-Shelf Package Implementation or In-House Software Development)?--Glossary--Index
- Cambridge, MA : Morgan Kaufmann is an imprint of Elsevier, [2016]
- Description
- Book — 1 online resource
- Summary
-
- 1. Managing Trade-Offs in Adaptable Software Architectures Part I: Concepts and Models for Self-Adaptive Software Architectures
- 2. Architecting Software Systems for Runtime Self-Adaptation: Concepts, Models, and Challenges
- 3. A Classification Framework of Uncertainty in Architecture-Based Self-Adaptive Systems With Multiple Quality Requirements
- 4. An Architecture Viewpoint for Modeling Dynamically Configurable Software Systems
- 5. Adaptive Security for Software Systems Part II: Analyzing and Evaluating Trade-Offs in Self-Adaptive Software Architectures
- 6. Automated Inference Techniques to Assist With the Construction of Self-Adaptive Software
- 7. Evaluating Trade-Offs of Human Involvement in Self-Adaptive Systems
- 8. Principled Eliciting and Evaluation of Trade-Offs When Designing Self-Adaptive Systems Architectures
- 9. Analyzing the Architectures of Software-Intensive Ecosystems
- 10. Architectural Perspective for Design and Analysis of Scalable Software as a Service Architectures Part III: Managing Trade-Offs in Self-Adaptive Software Architectures
- 11. Managing Trade-offs in Self-Adaptive Software Architectures: A Systematic Mapping Study
- 12. The Many Facets of Mediation: A Requirements-Driven Approach for Trading Off Mediation Solutions Part IV: Quality Assurance in Self-Adaptive Software Architectures
- 13. An Overview on Quality Evaluation of Self-Adaptive Systems
- 14. Identifying and Handling Uncertainties in the Feedback Control Loop.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
- [Alicante] : Universidad de Alicante, ©1999.
- Description
- Book — 1 online resource (282 pages) : illustrations.
- Baer, Jean-Loup.
- New York : Cambridge University Press, ©2010.
- Description
- Book — 1 online resource : illustrations
- Summary
-
- 1. Introduction
- 2. The basics
- 3. Superscalar processors
- 4. Front-end: branch prediction, instruction fetching, and register renaming
- 5. Back-end: instruction scheduling, memory access instructions, and clusters
- 6. The cache hierarchy
- 7. Multiprocessors
- 8. Multithreading and (chip) multiprocessors
- 9. Current limitations and future challenges.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
- Solihin, Yan, author.
- 1st - Boca Raton : Chapman & Hall/CRC, 2015.
- Description
- Book — 1 online resource : illustrations (black and white)
- Summary
-
- Perspectives on Multicore Architectures The Origin of the Multicore Architecture Perspectives on Parallel Computers Future Multicore Architectures
- Perspectives on Parallel Programming Limits on Parallel Program Performance Parallel Programming Models
- Shared Memory Parallel Programming Steps in Parallel Programming Dependence Analysis Identifying Parallel Tasks in Loop Structures Identifying Parallelism at Other Levels Identifying Parallelism through Algorithm Knowledge Determining the Scope of Variables Synchronization Assigning Tasks to Threads Mapping Threads to Processors A Brief Introduction to OpenMP
- Parallel Programming for Linked Data Structures Parallelization Challenges in LDS Approaches to Parallelization of LDS Parallelization Techniques for Linked Lists The Role of Transactional Memory
- Introduction to Memory Hierarchy Organization Motivation for Memory Hierarchy Basic Architectures of a Cache Cache Performance Prefetching Cache Design in Multicore Architecture Physical Cache Organization Logical Cache Organization Case Studies
- Introduction to Shared Memory Multiprocessors The Cache Coherence Problem Memory Consistency Problem Synchronization Problem
- Basic Cache Coherence Issues Overview Cache Coherence in Bus-Based Multiprocessors Impact of Cache Design on Cache Coherence Performance Performance and Other Practical Issues Broadcast Protocol with Point-to-Point Interconnect
- Hardware Support for Synchronization Lock Implementations Barrier Implementations Transactional Memory
- Memory Consistency Models Programmers' Intuition Architecture Mechanisms for Ensuring Sequential Consistency Relaxed Consistency Models Synchronization in Different Memory Consistency Models
- Advanced Cache Coherence Issues Directory Coherence Protocols Overview of Directory Coherence Protocol Basic Directory Cache Coherence Protocol Implementation Correctness and Performance Contemporary Design Issues
- Interconnection Network Architecture Link, Channel, and Latency Network Topology Routing Policies and Algorithms Router Architecture Case Study: Alpha 21364 Network Architecture Multicore Design Issues
- SIMT Architecture SIMT Programming Model Mapping SIMT Workloads to SIMT Cores SIMT Core Architecture
- Ask the Experts
- Exercises appear at the end of each chapter.
- (source: Nielsen Book Data)
- Perspectives on Multicore Architectures. Perspectives on Parallel Programming. Shared Memory Parallel Programming. Parallel Programming for Linked Data Structures. Introduction to Memory Hierarchy Organization. Introduction to Shared Memory Multiprocessors. Basic Cache Coherence Issues. Hardware Support for Synchronization. Memory Consistency Models. Advanced Cache Coherence Issues. Interconnection Network Architecture. SIMT Architecture. Ask the Experts.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
Although multicore is now a mainstream architecture, there are few textbooks that cover parallel multicore architectures. Filling this gap, Fundamentals of Parallel Multicore Architecture provides all the material for a graduate or senior undergraduate course that focuses on the architecture of multicore processors. The book is also useful as a reference for professionals who deal with programming on multicore or designing multicore chips. The text's coverage of fundamental topics prepares students to study research papers in the multicore architecture area. The text offers many pedagogical features, including: Sufficiently short chapters that can be comfortably read over a weekend Introducing each concept by first describing the problem and building intuition that leads to the need for the concept "Did you know?" boxes that present mini case studies, alternative points of view, examples, and other interesting facts or discussion items Thought-provoking interviews with experts who share their perspectives on multicore architectures in the past, present, and future Online programming assignments and solutions that enhance students' understanding The first several chapters address programming issues in shared memory multiprocessors, such as the programming model and techniques to parallelize regular and irregular applications. The core of the book covers the architectures for shared memory multiprocessors. The final chapter contains interviews with experts in parallel multicore architecture.
(source: Nielsen Book Data)
- Osterhage, Wolfgang.
- Berlin ; London : Springer, 2013.
- Description
- Book — 1 online resource Digital: text file; PDF.
- Summary
-
- Introduction
- Performance Theory
- Performance Measurement
- Analysis
- Optimisation
- Network Performance
- Process Performance
- Best Practise Examples
- Limits and Overall Application Context
- Checklists
- Appendixes.
(source: Nielsen Book Data)
14. Analysis and synthesis of computer systems [2010]
- Gelenbe, Erol, 1945-
- 2nd ed. - London, UK : Imperial College Press, ©2010.
- Description
- Book — 1 online resource (x, 313 pages) : illustrations.
- Summary
-
- Basic Tools of Probabilistic Modelling
- The Queue with Server of Walking Type and Its Applications to Computer System Modelling
- Queueing Network Models
- Queueing Networks with Multiple Classes of Positive and Negative Customers and Product Form Solution
- Markov-Modulated Queues
- Diffusion Approximation Methods for General Queueing Networks
- Approximate Decomposition and Iterative Techniques for Closed Model Solution
- Synthesis Problems in Single-Resource Systems: Characterisation and Control of Achievable Performance
- Control of Performance in Mutliple-Resource Systems
- A Queue with Server of Walking Type.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
15. Analysis and synthesis of computer systems [2010]
- Gelenbe, Erol, 1945-
- 2nd ed. - London, UK : Imperial College Press, ©2010.
- Description
- Book — 1 online resource (x, 313 pages) : illustrations.
- Summary
-
- Basic Tools of Probabilistic Modelling
- The Queue with Server of Walking Type and Its Applications to Computer System Modelling
- Queueing Network Models
- Queueing Networks with Multiple Classes of Positive and Negative Customers and Product Form Solution
- Markov-Modulated Queues
- Diffusion Approximation Methods for General Queueing Networks
- Approximate Decomposition and Iterative Techniques for Closed Model Solution
- Synthesis Problems in Single-Resource Systems: Characterisation and Control of Achievable Performance
- Control of Performance in Mutliple-Resource Systems
- A Queue with Server of Walking Type.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
16. Embedded system design on a shoestring : achieving high performance with a limited budget [2003]
- Edwards, Lewin A. R. W.
- Amsterdam ; London : Newnes, ©2003.
- Description
- Book — 1 online resource (ix, 232 pages) : illustrations
- Summary
-
- Introduction
- Before You Start: Fundamental Decisions
- The GNU Toolchain
- Gas: The GNU Assembler
- Ld: GNU Linker
- Converting Files with Objcopy
- Objdump: Check Your Executable's Layout
- Size: Check the Load Size of Your Executable
- Gdb: The GNU Debugger
- Example Firmware Walkthroughs and Debugging Techniques
- Portability and Reliability Considerations
- Useful Vendors and Other Web Resources
- Index of Companion Website Contents
- Acknowledgements.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
- Patterson, David A.
- 3rd ed. rev. - Amsterdam ; Boston : Elsevier/Morgan Kaufmann, ©2007.
- Description
- Book — 1 online resource (1 volume (various pagings)) : illustrations
- Summary
-
- 1 Computer Abstractions and Technology
- 2 Instructions: Language of the Computer
- 3 Arithmetic for Computers
- 4 Assessing and Understanding Performance
- 5 The Processor: Datapath and Control
- 6 Enhancing Performance with Pipelining
- 7 Large and Fast: Exploiting Memory Hierarchy
- 8 Storage, Networks, and Other Peripherals On the CD:
- 9 Multiprocessors Appendix A: Assemblers, Linkers, and the Spim simulator Appendix B: The Basics of Logic Design Appendix C: Mapping Control to Hardware Appendix D: A Survey of RISC Architectures for Desktop, Server, and Embedded Computers.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
- Singapore ; Hackensack, NJ : World Scientific, 2007.
- Description
- Book — 1 online resource (x, 281 pages) : illustrations
- Summary
-
- The State-of-the-Art of Fault Tolerance in the Software Development Life-Cycle
- Model Driven Engineering of Fault-Tolerant Systems
- Validation and Verification of Fault-Tolerant Systems
- Tools and Frameworks for Implementing Fault-Tolerant Systems.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
19. Beyond Software Architecture [electronic resource]: Creating and Sustaining Winning Solutions [2003]
- Hohmann, Luke Author.
- Boston : Addison Wesley Professional Jan. 2003.
- Description
- Book — 1 online resource (352 p. :) ill.
- Summary
-
At last, a book that provides the software engineering community with a clearer understanding of the business value of software architecture. There are currently a significant number of books on creating, documenting, and implementing software architecture, but precious few resources have addressed how to build a software architecture that aligns with a customer's overall business goals. In this new book, Luke Hohmann borrows from his extensive experience managing successful enterprise software projects to provide practical wisdom on creating and sustaining winning software solutions. This book helps technologists grasp the business ramifications of their decisions, and provides business-oriented software professionals (e.g. sales people and marketers) with better knowledge of how robust software can be built and maintained.
(source: Nielsen Book Data)
20. Processor and system-on-chip simulation [2010]
- New York ; London : Springer, 2010.
- Description
- Book — 1 online resource Digital: text file; PDF.
- Summary
-
- System Simulation and Exploration.- The Life Cycle of a Virtual Platform.- Full-System Simulation from Embedded to High-Performance Systems.- Toward the Datacenter: Scaling Simulation Up and Out.- Modular ISA-Independent Full-System Simulation.- Structural Simulation for Architecture Exploration.- Fast Simulation.- Accelerating Simulation with FPGAs.- Scalable Simulation for MPSoC Software and Architectures.- Adaptive High-Speed Processor Simulation.- Representative Sampling Using SimPoint.- Statistical Sampling.- Efficient Cache Modeling with Sparse Data.- Statistical Simulation.- Impact of Silicon Technology.- Memory Modeling with CACTI.- Thermal Modeling for Processors and Systems-on-Chip.- Rapid Technology-Aware Design Space Exploration for Embedded Heterogeneous Multiprocessors.- Embedded Systems Simulation.- IP Modeling and Verification.- Configurable, Extensible Processor System Simulation.- Simulation Acceleration in Wireless Baseband Processing.- Trace-Driven Workload Simulation for MPSoC Software Performance Estimation.
- (source: Nielsen Book Data)
(source: Nielsen Book Data)
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